test_utils_subst \
test_utils_time \
test_utils_vl_lookup \
- test_libcollectd_network_parse
+ test_libcollectd_network_parse \
+ test_utils_config_cores
TESTS = $(check_PROGRAMS)
src/daemon/utils_subst.h
test_utils_subst_LDADD = libplugin_mock.la
+test_utils_config_cores_SOURCES = \
+ src/utils_config_cores_test.c \
+ src/testing.h
+test_utils_config_cores_LDADD = libplugin_mock.la
+
libavltree_la_SOURCES = \
src/daemon/utils_avltree.c \
src/daemon/utils_avltree.h
if BUILD_PLUGIN_INTEL_PMU
pkglib_LTLIBRARIES += intel_pmu.la
-intel_pmu_la_SOURCES = src/intel_pmu.c
+intel_pmu_la_SOURCES = src/intel_pmu.c \
+ src/utils_config_cores.h \
+ src/utils_config_cores.c
intel_pmu_la_CPPFLAGS = $(AM_CPPFLAGS) $(BUILD_WITH_LIBJEVENTS_CPPFLAGS)
intel_pmu_la_LDFLAGS = $(PLUGIN_LDFLAGS) $(BUILD_WITH_LIBJEVENTS_LDFLAGS)
intel_pmu_la_LIBADD = $(BUILD_WITH_LIBJEVENTS_LIBS)
# ReportSoftwareEvents true
# EventList "/var/cache/pmu/GenuineIntel-6-2D-core.json"
# HardwareEvents "L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS" "L2_RQSTS.ALL_CODE_RD"
+# Cores "[0-3]"
#</Plugin>
#<Plugin "intel_rdt">
ReportSoftwareEvents true
EventList "/var/cache/pmu/GenuineIntel-6-2D-core.json"
HardwareEvents "L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS" "L2_RQSTS.ALL_CODE_RD"
+ Cores "0-3" "4,6" "[12-15]"
</Plugin>
B<Options:>
This field is a list of event names or groups of comma separated event names.
This option requires B<EventList> option to be configured.
+=item B<Cores> I<cores groups>
+
+All events are reported on a per core basis. Monitoring of the events can be
+configured for a group of cores (aggregated statistics). This field defines
+groups of cores on which to monitor supported events. The field is represented
+as list of strings with core group values. Each string represents a list of
+cores in a group. If a group is enclosed in square brackets each core is added
+individually to a separate group (that is statistics are not aggregated).
+Allowed formats are:
+ 0,1,2,3
+ 0-10,20-18
+ 1,3,5-8,10,0x10-12
+ [4-15,32-63]
+
+If an empty string is provided as value for this field default cores
+configuration is applied - that is separate group is created for each core.
+
=back
=head2 Plugin C<intel_rdt>
*
* Authors:
* Serhiy Pshyk <serhiyx.pshyk@intel.com>
+ * Kamil Wiatrowski <kamilx.wiatrowski@intel.com>
**/
#include "collectd.h"
#include "common.h"
+#include "utils_config_cores.h"
+
#include <jevents.h>
#include <jsession.h>
char event_list_fn[PATH_MAX];
char **hw_events;
size_t hw_events_count;
+ core_groups_list_t cores;
struct eventlist *event_list;
};
typedef struct intel_pmu_ctx_s intel_pmu_ctx_t;
}
}
+static void pmu_dump_cgroups(void) {
+
+ DEBUG(PMU_PLUGIN ": Core groups:");
+
+ for (size_t i = 0; i < g_ctx.cores.num_cgroups; i++) {
+ core_group_t *cgroup = g_ctx.cores.cgroups + i;
+ const size_t cores_size = cgroup->num_cores * 4 + 1;
+ char *cores = calloc(cores_size, sizeof(*cores));
+ if (cores == NULL) {
+ DEBUG(PMU_PLUGIN ": Failed to allocate string to list cores.");
+ return;
+ }
+ for (size_t j = 0; j < cgroup->num_cores; j++)
+ snprintf(cores + strlen(cores), cores_size - strlen(cores), " %d",
+ cgroup->cores[j]);
+
+ DEBUG(PMU_PLUGIN ": group[%zu]", i);
+ DEBUG(PMU_PLUGIN ": description: %s", cgroup->desc);
+ DEBUG(PMU_PLUGIN ": cores count: %zu", cgroup->num_cores);
+ DEBUG(PMU_PLUGIN ": cores :%s", cores);
+ sfree(cores);
+ }
+}
+
#endif /* COLLECT_DEBUG */
+static int pmu_validate_cgroups(core_group_t *cgroups, size_t len,
+ int max_cores) {
+ /* i - group index, j - core index */
+ for (size_t i = 0; i < len; i++) {
+ for (size_t j = 0; j < cgroups[i].num_cores; j++) {
+ int core = (int) cgroups[i].cores[j];
+
+ /* Core index cannot exceed number of cores in system,
+ note that max_cores include both online and offline CPUs. */
+ if (core >= max_cores) {
+ ERROR(PMU_PLUGIN ": Core %d is not valid, max core index: %d.", core,
+ max_cores - 1);
+ return -1;
+ }
+ }
+ /* Check if cores are set in remaining groups */
+ for (size_t k = i+1; k < len; k++)
+ if (config_cores_cmp_cgroups(&cgroups[i], &cgroups[k]) != 0) {
+ ERROR(PMU_PLUGIN ": Same cores cannot be set in different groups.");
+ return -1;
+ }
+ }
+ return 0;
+}
+
static int pmu_config_hw_events(oconfig_item_t *ci) {
if (strcasecmp("HardwareEvents", ci->key) != 0) {
ret = pmu_config_hw_events(child);
} else if (strcasecmp("ReportSoftwareEvents", child->key) == 0) {
ret = cf_util_get_boolean(child, &g_ctx.sw_events);
+ } else if (strcasecmp("Cores", child->key) == 0) {
+ ret = config_cores_parse(child, &g_ctx.cores);
} else {
ERROR(PMU_PLUGIN ": Unknown configuration parameter \"%s\".", child->key);
ret = -1;
return 0;
}
-static void pmu_submit_counter(int cpu, char *event, counter_t value,
+static void pmu_submit_counter(char *cgroup, char *event, counter_t value,
meta_data_t *meta) {
value_list_t vl = VALUE_LIST_INIT;
vl.values_len = 1;
sstrncpy(vl.plugin, PMU_PLUGIN, sizeof(vl.plugin));
- if (cpu == -1) {
- snprintf(vl.plugin_instance, sizeof(vl.plugin_instance), "all");
- } else {
+ sstrncpy(vl.plugin_instance, cgroup, sizeof(vl.plugin_instance));
+ if (meta)
vl.meta = meta;
- snprintf(vl.plugin_instance, sizeof(vl.plugin_instance), "%d", cpu);
- }
sstrncpy(vl.type, "counter", sizeof(vl.type));
sstrncpy(vl.type_instance, event, sizeof(vl.type_instance));
struct event *e;
for (e = g_ctx.event_list->eventlist; e; e = e->next) {
- uint64_t all_value = 0;
- int event_enabled = 0;
- for (int i = 0; i < g_ctx.event_list->num_cpus; i++) {
-
- if (e->efd[i].fd < 0)
- continue;
-
- event_enabled++;
-
- /* If there are more events than counters, the kernel uses time
- * multiplexing. With multiplexing, at the end of the run,
- * the counter is scaled basing on total time enabled vs time running.
- * final_count = raw_count * time_enabled/time_running
- */
- uint64_t value = event_scaled_value(e, i);
- all_value += value;
-
- /* get meta data with information about scaling */
- meta_data_t *meta = pmu_meta_data_create(&e->efd[i]);
-
- /* dispatch per CPU value */
- pmu_submit_counter(i, e->event, value, meta);
-
- meta_data_destroy(meta);
- }
+ for (size_t i = 0; i < g_ctx.cores.num_cgroups; i++) {
+ core_group_t *cgroup = g_ctx.cores.cgroups + i;
+ uint64_t cgroup_value = 0;
+ int event_enabled_cgroup = 0;
+ meta_data_t *meta = NULL;
+
+ for (size_t j = 0; j < cgroup->num_cores; j++) {
+ int core = (int) cgroup->cores[j];
+ if (e->efd[core].fd < 0)
+ continue;
+
+ event_enabled_cgroup++;
+
+ /* If there are more events than counters, the kernel uses time
+ * multiplexing. With multiplexing, at the end of the run,
+ * the counter is scaled basing on total time enabled vs time running.
+ * final_count = raw_count * time_enabled/time_running
+ */
+ uint64_t value = event_scaled_value(e, core);
+ cgroup_value += value;
+
+ /* get meta data with information about scaling */
+ if (cgroup->num_cores == 1)
+ meta = pmu_meta_data_create(&e->efd[core]);
+ }
- if (event_enabled > 0) {
- DEBUG(PMU_PLUGIN ": %-20s %'10lu", e->event, all_value);
- /* dispatch all CPU value */
- pmu_submit_counter(-1, e->event, all_value, NULL);
+ if (event_enabled_cgroup > 0) {
+ DEBUG(PMU_PLUGIN ": %s/%s = %lu", e->event, cgroup->desc, cgroup_value);
+ /* dispatch per core group value */
+ pmu_submit_counter(cgroup->desc, e->event, cgroup_value, meta);
+ meta_data_destroy(meta);
+ }
}
}
}
static int pmu_read(__attribute__((unused)) user_data_t *ud) {
int ret;
+ struct event *e;
DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
- ret = read_all_events(g_ctx.event_list);
- if (ret != 0) {
- ERROR(PMU_PLUGIN ": Failed to read values of all events.");
- return ret;
+ /* read all events only for configured cores */
+ for (e = g_ctx.event_list->eventlist; e; e = e->next) {
+ for (size_t i = 0; i < g_ctx.cores.num_cgroups; i++) {
+ core_group_t *cgroup = g_ctx.cores.cgroups + i;
+ for (size_t j = 0; j < cgroup->num_cores; j++) {
+ int core = (int) cgroup->cores[j];
+ if (e->efd[core].fd < 0)
+ continue;
+
+ ret = read_event(e, core);
+ if (ret != 0) {
+ ERROR(PMU_PLUGIN ": Failed to read value of %s/%d event.", e->event,
+ core);
+ return ret;
+ }
+ }
+ }
}
pmu_dispatch_data();
for (e = el->eventlist; e; e = e->next) {
- for (int i = 0; i < el->num_cpus; i++) {
- if (setup_event(e, i, leader, measure_all, measure_pid) < 0) {
- WARNING(PMU_PLUGIN ": perf event '%s' is not available (cpu=%d).",
- e->event, i);
- } else {
- /* success if at least one event was set */
- ret = 0;
+ for (size_t i = 0; i < g_ctx.cores.num_cgroups; i++) {
+ core_group_t *cgroup = g_ctx.cores.cgroups + i;
+ for (size_t j = 0; j < cgroup->num_cores; j++) {
+ int core = (int) cgroup->cores[j];
+
+ if (setup_event(e, core, leader, measure_all, measure_pid) < 0) {
+ WARNING(PMU_PLUGIN ": perf event '%s' is not available (cpu=%d).",
+ e->event, core);
+ } else {
+ /* success if at least one event was set */
+ ret = 0;
+ }
}
}
return -ENOMEM;
}
+ if (g_ctx.cores.num_cgroups == 0) {
+ ret = config_cores_default(g_ctx.event_list->num_cpus, &g_ctx.cores);
+ if (ret != 0) {
+ ERROR(PMU_PLUGIN ": Failed to set default core groups.");
+ goto init_error;
+ }
+ } else {
+ ret = pmu_validate_cgroups(g_ctx.cores.cgroups, g_ctx.cores.num_cgroups,
+ g_ctx.event_list->num_cpus);
+ if (ret != 0) {
+ ERROR(PMU_PLUGIN ": Invalid core groups configuration.");
+ goto init_error;
+ }
+ }
+#if COLLECT_DEBUG
+ pmu_dump_cgroups();
+#endif
+
if (g_ctx.hw_cache_events) {
ret =
pmu_add_events(g_ctx.event_list, PERF_TYPE_HW_CACHE, g_hw_cache_events,
sfree(g_ctx.hw_events);
g_ctx.hw_events_count = 0;
+ config_cores_cleanup(&g_ctx.cores);
+
return ret;
}
sfree(g_ctx.hw_events);
g_ctx.hw_events_count = 0;
+ config_cores_cleanup(&g_ctx.cores);
+
return 0;
}
--- /dev/null
+/**
+ * collectd - src/utils_config_cores.c
+ *
+ * Copyright(c) 2017 Intel Corporation. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ * Kamil Wiatrowski <kamilx.wiatrowski@intel.com>
+ **/
+
+#include "collectd.h"
+
+#include "common.h"
+
+#include "utils_config_cores.h"
+
+#define UTIL_NAME "utils_config_cores"
+
+#define MAX_SOCKETS 8
+#define MAX_SOCKET_CORES 64
+#define MAX_CORES (MAX_SOCKET_CORES * MAX_SOCKETS)
+
+static inline _Bool is_in_list(unsigned val, const unsigned *list, size_t len) {
+ for (size_t i = 0; i < len; i++)
+ if (list[i] == val)
+ return 1;
+ return 0;
+}
+
+static int str_to_uint(const char *s, unsigned *n) {
+ if (s == NULL || n == NULL)
+ return -EINVAL;
+ char *endptr = NULL;
+
+ *n = (unsigned) strtoul(s, &endptr, 0);
+ if (*s == '\0' || *endptr != '\0') {
+ ERROR(UTIL_NAME ": Failed to parse '%s' into unsigned number", s);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/*
+ * NAME
+ * str_list_to_nums
+ *
+ * DESCRIPTION
+ * Converts string of characters representing list of numbers into array of
+ * numbers. Allowed formats are:
+ * 0,1,2,3
+ * 0-10,20-18
+ * 1,3,5-8,10,0x10-12
+ *
+ * Numbers can be in decimal or hexadecimal format.
+ *
+ * PARAMETERS
+ * `s' String representing list of unsigned numbers.
+ * `nums' Array to put converted numeric values into.
+ * `nums_len' Maximum number of elements that nums can accommodate.
+ *
+ * RETURN VALUE
+ * Number of elements placed into nums.
+ */
+static size_t str_list_to_nums(char *s, unsigned *nums, size_t nums_len) {
+ char *saveptr;
+ char *token;
+ size_t idx = 0;
+
+ while((token = strtok_r(s, ",", &saveptr))) {
+ char *pos;
+ unsigned start, end = 0;
+ s = NULL;
+
+ while (isspace(*token))
+ token++;
+ if (*token == '\0')
+ continue;
+
+ pos = strchr(token, '-');
+ if (pos) {
+ *pos = '\0';
+ }
+
+ if (str_to_uint(token, &start))
+ return 0;
+
+ if (pos) {
+ if (str_to_uint(pos + 1, &end))
+ return 0;
+ } else {
+ end = start;
+ }
+
+ if (start > end) {
+ unsigned swap = start;
+ start = end;
+ end = swap;
+ }
+
+ for (unsigned i = start; i <= end; i++) {
+ if (is_in_list(i, nums, idx))
+ continue;
+ if (idx >= nums_len) {
+ WARNING(UTIL_NAME ": exceeded the cores number limit: %zu", nums_len);
+ return idx;
+ }
+ nums[idx] = i;
+ idx++;
+ }
+ }
+ return idx;
+}
+
+/*
+ * NAME
+ * check_core_grouping
+ *
+ * DESCRIPTION
+ * Look for [...] brackets in *in string and if found copy the
+ * part between brackets into *out string and set grouped to 0.
+ * Otherwise grouped is set to 1 and input is copied without leading
+ * whitespaces.
+ *
+ * PARAMETERS
+ * `out' Output string to store result.
+ * `in' Input string to be parsed and copied.
+ * `out_size' Maximum number of elements that out can accommodate.
+ * `grouped' Set by function depending if cores should be grouped or not.
+ *
+ * RETURN VALUE
+ * Zero upon success or non-zero if an error occurred.
+ */
+static int check_core_grouping(char *out, const char *in, size_t out_size,
+ _Bool *grouped) {
+ const char *start = in;
+ char *end;
+ while (isspace(*start))
+ ++start;
+ if (start[0] == '[') {
+ *grouped = 0;
+ ++start;
+ end = strchr(start, ']');
+ if (end == NULL) {
+ ERROR(UTIL_NAME ": Missing closing bracket ] in option %s.", in);
+ return -EINVAL;
+ }
+ if ((end - start) >= out_size) {
+ ERROR(UTIL_NAME ": Out buffer is too small.");
+ return -EINVAL;
+ }
+ sstrncpy(out, start, end - start + 1);
+ DEBUG(UTIL_NAME ": Mask for individual (not aggregated) cores: %s", out);
+ } else {
+ *grouped = 1;
+ sstrncpy(out, start, out_size);
+ }
+ return 0;
+}
+
+int config_cores_parse(const oconfig_item_t *ci, core_groups_list_t *cgl) {
+ if (ci == NULL || cgl == NULL)
+ return -EINVAL;
+ if (ci->values_num == 0 || ci->values_num > MAX_CORES)
+ return -EINVAL;
+ core_group_t cgroups[MAX_CORES] = {{0}};
+ size_t cg_idx = 0; /* index for cgroups array */
+ int ret = 0;
+
+ for (int i = 0; i < ci->values_num; i++) {
+ if (ci->values[i].type != OCONFIG_TYPE_STRING) {
+ WARNING(UTIL_NAME ": The %s option requires string arguments.", ci->key);
+ return -EINVAL;
+ }
+ }
+
+ if (ci->values_num == 1 && ci->values[0].value.string &&
+ strlen(ci->values[0].value.string) == 0)
+ return 0;
+
+ for (int i = 0; i < ci->values_num; i++) {
+ size_t n;
+ _Bool grouped = 1;
+ char str[DATA_MAX_NAME_LEN];
+ unsigned cores[MAX_CORES] = {0};
+
+ if (cg_idx >= STATIC_ARRAY_SIZE(cgroups)) {
+ ERROR(UTIL_NAME ": Configuration exceeds maximum number of cores: %zu",
+ STATIC_ARRAY_SIZE(cgroups));
+ ret = -EINVAL;
+ goto parse_error;
+ }
+ if ((ci->values[i].value.string == NULL) ||
+ (strlen(ci->values[i].value.string) == 0)) {
+ ERROR(UTIL_NAME ": Failed to parse parameters for %s option.", ci->key);
+ ret = -EINVAL;
+ goto parse_error;
+ }
+
+ ret = check_core_grouping(str, ci->values[i].value.string, sizeof(str),
+ &grouped);
+ if (ret != 0) {
+ ERROR(UTIL_NAME ": Failed to parse config option [%d] %s.", i,
+ ci->values[i].value.string);
+ goto parse_error;
+ }
+ n = str_list_to_nums(str, cores, STATIC_ARRAY_SIZE(cores));
+ if (n == 0) {
+ ERROR(UTIL_NAME ": Failed to parse config option [%d] %s.", i,
+ ci->values[i].value.string);
+ ret = -EINVAL;
+ goto parse_error;
+ }
+
+ if (grouped) {
+ cgroups[cg_idx].desc = strdup(ci->values[i].value.string);
+ if (cgroups[cg_idx].desc == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate description.");
+ ret = -ENOMEM;
+ goto parse_error;
+ }
+
+ cgroups[cg_idx].cores = calloc(n, sizeof(*cgroups[cg_idx].cores));
+ if (cgroups[cg_idx].cores == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate cores for cgroup.");
+ ret = -ENOMEM;
+ goto parse_error;
+ }
+
+ for (size_t j = 0; j < n; j++)
+ cgroups[cg_idx].cores[j] = cores[j];
+
+ cgroups[cg_idx].num_cores = n;
+ cg_idx++;
+ } else {
+ for (size_t j = 0; j < n && cg_idx < STATIC_ARRAY_SIZE(cgroups); j++) {
+ char desc[DATA_MAX_NAME_LEN];
+ snprintf(desc, sizeof(desc), "%u", cores[j]);
+
+ cgroups[cg_idx].desc = strdup(desc);
+ if (cgroups[cg_idx].desc == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate desc for core %u.", cores[j]);
+ ret = -ENOMEM;
+ goto parse_error;
+ }
+
+ cgroups[cg_idx].cores = calloc(1, sizeof(*(cgroups[cg_idx].cores)));
+ if (cgroups[cg_idx].cores == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate cgroup for core %u.", cores[j]);
+ ret = -ENOMEM;
+ goto parse_error;
+ }
+ cgroups[cg_idx].num_cores = 1;
+ cgroups[cg_idx].cores[0] = cores[j];
+ cg_idx++;
+ }
+ }
+ }
+
+ cgl->cgroups = calloc(cg_idx, sizeof(*cgl->cgroups));
+ if (cgl->cgroups == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate core groups.");
+ ret = -ENOMEM;
+ goto parse_error;
+ }
+
+ cgl->num_cgroups = cg_idx;
+ for (size_t i = 0; i < cg_idx; i++)
+ cgl->cgroups[i] = cgroups[i];
+
+ return 0;
+
+parse_error:
+
+ cg_idx = 0;
+ while(cg_idx < STATIC_ARRAY_SIZE(cgroups) && cgroups[cg_idx].desc != NULL) {
+ sfree(cgroups[cg_idx].desc);
+ sfree(cgroups[cg_idx].cores);
+ cg_idx++;
+ }
+ return ret;
+}
+
+int config_cores_default(int num_cores, core_groups_list_t *cgl) {
+ if (cgl == NULL || num_cores < 0 || num_cores > MAX_CORES)
+ return -EINVAL;
+
+ cgl->cgroups = calloc(num_cores, sizeof(*(cgl->cgroups)));
+ if (cgl->cgroups == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate memory for core groups.");
+ return -ENOMEM;
+ }
+ cgl->num_cgroups = num_cores;
+
+ for (int i = 0; i < num_cores; i++) {
+ char desc[DATA_MAX_NAME_LEN];
+ snprintf(desc, sizeof(desc), "%d", i);
+
+ cgl->cgroups[i].cores = calloc(1, sizeof(*(cgl->cgroups[i].cores)));
+ if (cgl->cgroups[i].cores == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate default cores for cgroup %d.", i);
+ config_cores_cleanup(cgl);
+ return -ENOMEM;
+ }
+ cgl->cgroups[i].num_cores = 1;
+ cgl->cgroups[i].cores[0] = i;
+
+ cgl->cgroups[i].desc = strdup(desc);
+ if (cgl->cgroups[i].desc == NULL) {
+ ERROR(UTIL_NAME ": Failed to allocate description for cgroup %d.", i);
+ config_cores_cleanup(cgl);
+ return -ENOMEM;
+ }
+ }
+ return 0;
+}
+
+void config_cores_cleanup(core_groups_list_t *cgl) {
+ if (cgl == NULL)
+ return;
+ for (size_t i = 0; i < cgl->num_cgroups; i++) {
+ sfree(cgl->cgroups[i].desc);
+ sfree(cgl->cgroups[i].cores);
+ }
+ sfree(cgl->cgroups);
+ cgl->num_cgroups = 0;
+}
+
+int config_cores_cmp_cgroups(const core_group_t *cg_a,
+ const core_group_t *cg_b) {
+ size_t found = 0;
+
+ assert(cg_a != NULL);
+ assert(cg_b != NULL);
+
+ const size_t sz_a = cg_a->num_cores;
+ const size_t sz_b = cg_b->num_cores;
+ const unsigned *tab_a = cg_a->cores;
+ const unsigned *tab_b = cg_b->cores;
+
+ for (size_t i = 0; i < sz_a; i++)
+ if (is_in_list(tab_a[i], tab_b, sz_b))
+ found++;
+
+ /* if no cores are the same */
+ if (!found)
+ return 0;
+ /* if group contains same cores */
+ if (sz_a == sz_b && sz_b == found)
+ return 1;
+ /* if not all cores are the same */
+ return -1;
+}
+
--- /dev/null
+/**
+ * collectd - src/utils_config_cores.h
+ *
+ * Copyright(c) 2017 Intel Corporation. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ * Kamil Wiatrowski <kamilx.wiatrowski@intel.com>
+ **/
+
+#ifndef UTILS_CONFIG_CORES_H
+#define UTILS_CONFIG_CORES_H 1
+
+struct core_group_s {
+ char *desc;
+ unsigned *cores;
+ size_t num_cores;
+};
+typedef struct core_group_s core_group_t;
+
+struct core_groups_list_s {
+ core_group_t *cgroups;
+ size_t num_cgroups;
+};
+typedef struct core_groups_list_s core_groups_list_t;
+
+/*
+ * NAME
+ * config_cores_parse
+ *
+ * DESCRIPTION
+ * Convert strings from config item into list of core groups.
+ *
+ * PARAMETERS
+ * `ci' Pointer to config item.
+ * `cgl' Pointer to core groups list to be filled.
+ *
+ * RETURN VALUE
+ * Zero upon success or non-zero if an error occurred.
+ *
+ * NOTES
+ * In case of an error, *cgl is not modified.
+ * Numbers can be in decimal or hexadecimal format.
+ * The memory allocated for *cgroups in list needs to be freed
+ * with config_cores_cleanup.
+ *
+ * EXAMPLES
+ * If config is "0-3" "[4-15]" it means that cores 0-3 are aggregated
+ * into one group and cores 4 to 15 are stored individualily in
+ * separate groups. Examples of allowed formats:
+ * "0,3,4" "10-15" - cores collected into two groups
+ * "0" "0x3" "7" - 3 cores, each in individual group
+ * "[32-63]" - 32 cores, each in individual group
+ *
+ * For empty string "" *cgl is not modified and zero is returned.
+ */
+int config_cores_parse(const oconfig_item_t *ci, core_groups_list_t *cgl);
+
+/*
+ * NAME
+ * config_cores_default
+ *
+ * DESCRIPTION
+ * Set number of cores starting from zero into individual
+ * core groups in *cgl list.
+ *
+ * PARAMETERS
+ * `num_cores' Number of cores to be configured.
+ * `cgl' Pointer to core groups list.
+ *
+ * RETURN VALUE
+ * Zero upon success or non-zero if an error occurred.
+ *
+ * NOTES
+ * The memory allocated for *cgroups in list needs to be freed
+ * with config_cores_cleanup. In case of error the memory is
+ * freed by the function itself.
+ */
+int config_cores_default(int num_cores, core_groups_list_t *cgl);
+
+/*
+ * NAME
+ * config_cores_cleanup
+ *
+ * DESCRIPTION
+ * Free the memory allocated for cgroups and set
+ * num_cgroups to zero.
+ *
+ * PARAMETERS
+ * `cgl' Pointer to core groups list.
+ */
+void config_cores_cleanup(core_groups_list_t *cgl);
+
+/*
+ * NAME
+ * config_cores_cmp_cgroups
+ *
+ * DESCRIPTION
+ * Function to compare cores in 2 core groups.
+ *
+ * PARAMETERS
+ * `cg_a' Pointer to core group a.
+ * `cg_b' Pointer to core group b.
+ *
+ * RETURN VALUE
+ * 1 if both groups contain the same cores
+ * 0 if none of their cores match
+ * -1 if some but not all cores match
+ */
+int config_cores_cmp_cgroups(const core_group_t *cg_a,
+ const core_group_t *cg_b);
+
+#endif /* UTILS_CONFIG_CORES_H */
+
--- /dev/null
+/**
+ * collectd - src/utils_config_cores_test.c
+ *
+ * Copyright(c) 2017 Intel Corporation. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ * Kamil Wiatrowski <kamilx.wiatrowski@intel.com>
+ **/
+
+#include "testing.h"
+#include "utils_config_cores.c" /* sic */
+
+oconfig_value_t test_cfg_values[] = {
+ { {"0"}, OCONFIG_TYPE_STRING },
+ { {"1-2"}, OCONFIG_TYPE_STRING },
+ { {"[3-4]"}, OCONFIG_TYPE_STRING }};
+
+oconfig_item_t test_cfg = {
+ "Cores",
+ test_cfg_values,
+ STATIC_ARRAY_SIZE(test_cfg_values),
+ NULL,
+ NULL,
+ 0 };
+
+static int compare_with_test_config(core_groups_list_t *cgl) {
+ if (cgl->num_cgroups == 4 &&
+ cgl->cgroups[0].num_cores == 1 &&
+ strcmp("0", cgl->cgroups[0].desc) == 0 &&
+ cgl->cgroups[0].cores[0] == 0 &&
+ cgl->cgroups[1].num_cores == 2 &&
+ strcmp("1-2", cgl->cgroups[1].desc) == 0 &&
+ cgl->cgroups[1].cores[0] == 1 &&
+ cgl->cgroups[1].cores[1] == 2 &&
+ cgl->cgroups[2].num_cores == 1 &&
+ strcmp("3", cgl->cgroups[2].desc) == 0 &&
+ cgl->cgroups[2].cores[0] == 3 &&
+ cgl->cgroups[3].num_cores == 1 &&
+ strcmp("4", cgl->cgroups[3].desc) == 0 &&
+ cgl->cgroups[3].cores[0] == 4)
+ return 0;
+
+ return -1;
+}
+
+DEF_TEST(string_to_uint) {
+ int ret = 0;
+ char *s = "13", *s1 = "0xd", *s2 = "g";
+ unsigned n = 0;
+
+ ret = str_to_uint(s, &n);
+ EXPECT_EQ_INT(0, ret);
+ EXPECT_EQ_INT(13, n);
+
+ ret = str_to_uint(s1, &n);
+ EXPECT_EQ_INT(0, ret);
+ EXPECT_EQ_INT(13, n);
+
+ ret = str_to_uint(s2, &n);
+ OK(ret < 0);
+
+ ret = str_to_uint(NULL, &n);
+ OK(ret < 0);
+ return 0;
+}
+
+DEF_TEST(cores_list_to_numbers) {
+ size_t n = 0;
+ unsigned nums[MAX_CORES];
+ char str[64] = "";
+
+ n = str_list_to_nums(str, nums, STATIC_ARRAY_SIZE(nums));
+ EXPECT_EQ_INT(0, n);
+
+ strncpy(str, "1", STATIC_ARRAY_SIZE(str));
+ n = str_list_to_nums(str, nums, STATIC_ARRAY_SIZE(nums));
+ EXPECT_EQ_INT(1, n);
+ EXPECT_EQ_INT(1, nums[0]);
+
+ strncpy(str, "0,2-3", STATIC_ARRAY_SIZE(str));
+ n = str_list_to_nums(str, nums, STATIC_ARRAY_SIZE(nums));
+ EXPECT_EQ_INT(3, n);
+ EXPECT_EQ_INT(0, nums[0]);
+ EXPECT_EQ_INT(2, nums[1]);
+ EXPECT_EQ_INT(3, nums[2]);
+
+ strncpy(str, "11-0xa", STATIC_ARRAY_SIZE(str));
+ n = str_list_to_nums(str, nums, STATIC_ARRAY_SIZE(nums));
+ EXPECT_EQ_INT(2, n);
+ EXPECT_EQ_INT(10, nums[0]);
+ EXPECT_EQ_INT(11, nums[1]);
+
+ snprintf(str, sizeof(str), "0-%d", (MAX_CORES - 1));
+ n = str_list_to_nums(str, nums, STATIC_ARRAY_SIZE(nums));
+ EXPECT_EQ_INT(MAX_CORES, n);
+ EXPECT_EQ_INT(0, nums[0]);
+ EXPECT_EQ_INT(MAX_CORES-1, nums[MAX_CORES-1]);
+
+ /* Should return 0 for incorrect syntax. */
+ strncpy(str, "5g", STATIC_ARRAY_SIZE(str));
+ n = str_list_to_nums(str, nums, STATIC_ARRAY_SIZE(nums));
+ EXPECT_EQ_INT(0, n);
+ return 0;
+}
+
+DEF_TEST(check_grouped_cores) {
+ int ret = 0;
+ _Bool grouped;
+ char src[64] = "[5-15]";
+ char dest[64];
+
+ ret = check_core_grouping(dest, src, sizeof(dest), &grouped);
+ EXPECT_EQ_INT(0, ret);
+ EXPECT_EQ_INT(0, grouped);
+ EXPECT_EQ_STR("5-15", dest);
+
+ strncpy(src, " 5-15", STATIC_ARRAY_SIZE(src));
+ ret = check_core_grouping(dest, src, sizeof(dest), &grouped);
+ EXPECT_EQ_INT(0, ret);
+ EXPECT_EQ_INT(1, grouped);
+ EXPECT_EQ_STR("5-15", dest);
+ return 0;
+}
+
+DEF_TEST(cores_option_parse) {
+ int ret = 0;
+ core_groups_list_t cgl = {0};
+
+ ret = config_cores_parse(&test_cfg, &cgl);
+ EXPECT_EQ_INT(0, ret);
+ CHECK_NOT_NULL(cgl.cgroups);
+ EXPECT_EQ_INT(0, compare_with_test_config(&cgl));
+
+ config_cores_cleanup(&cgl);
+ return 0;
+}
+
+DEF_TEST(cores_option_parse_fail) {
+ int ret = 0;
+ core_groups_list_t cgl = {0};
+ /* Wrong value, missing closing bracket ] */
+ oconfig_value_t values = { {"[0-15"}, OCONFIG_TYPE_STRING };
+ oconfig_item_t cfg = { "Cores", &values, 1, NULL, NULL, 0 };
+
+ ret = config_cores_parse(&cfg, &cgl);
+ EXPECT_EQ_INT(-EINVAL, ret);
+ EXPECT_EQ_INT(0, cgl.num_cgroups);
+ OK(NULL == cgl.cgroups);
+ return 0;
+}
+
+DEF_TEST(cores_default_list) {
+ int ret = 0;
+ core_groups_list_t cgl = {0};
+
+ ret = config_cores_default(2, &cgl);
+ EXPECT_EQ_INT(0, ret);
+ EXPECT_EQ_INT(2, cgl.num_cgroups);
+ CHECK_NOT_NULL(cgl.cgroups);
+
+ CHECK_NOT_NULL(cgl.cgroups[0].cores);
+ CHECK_NOT_NULL(cgl.cgroups[0].desc);
+ EXPECT_EQ_STR("0", cgl.cgroups[0].desc);
+ EXPECT_EQ_INT(1, cgl.cgroups[0].num_cores);
+ EXPECT_EQ_INT(0, cgl.cgroups[0].cores[0]);
+
+ CHECK_NOT_NULL(cgl.cgroups[1].cores);
+ CHECK_NOT_NULL(cgl.cgroups[1].desc);
+ EXPECT_EQ_STR("1", cgl.cgroups[1].desc);
+ EXPECT_EQ_INT(1, cgl.cgroups[1].num_cores);
+ EXPECT_EQ_INT(1, cgl.cgroups[1].cores[0]);
+
+ config_cores_cleanup(&cgl);
+ return 0;
+}
+
+DEF_TEST(cores_default_list_fail) {
+ int ret = 0;
+ core_groups_list_t cgl = {0};
+
+ ret = config_cores_default(-1, &cgl);
+ OK(ret < 0);
+ ret = config_cores_default(MAX_CORES+1, &cgl);
+ OK(ret < 0);
+ ret = config_cores_default(1, NULL);
+ OK(ret < 0);
+ return 0;
+}
+
+DEF_TEST(cores_group_cleanup) {
+ core_groups_list_t cgl;
+ cgl.cgroups = calloc(1, sizeof(*cgl.cgroups));
+ CHECK_NOT_NULL(cgl.cgroups);
+ cgl.num_cgroups = 1;
+ cgl.cgroups[0].desc = strdup("1");
+ cgl.cgroups[0].cores = calloc(1, sizeof(*cgl.cgroups[0].cores));
+ CHECK_NOT_NULL(cgl.cgroups[0].cores);
+ cgl.cgroups[0].cores[0] = 1;
+ cgl.cgroups[0].num_cores = 1;
+
+ config_cores_cleanup(&cgl);
+ OK(NULL == cgl.cgroups);
+ EXPECT_EQ_INT(0, cgl.num_cgroups);
+ return 0;
+}
+
+DEF_TEST(cores_group_cmp) {
+ unsigned cores_mock[] = {0,1,2};
+ core_group_t group_mock = { "0,1,2", cores_mock, 3 };
+ unsigned cores_mock_2[] = {2,3};
+ core_group_t group_mock_2 = { "2,3", cores_mock_2, 2 };
+
+ int ret = config_cores_cmp_cgroups(&group_mock, &group_mock);
+ EXPECT_EQ_INT(1, ret);
+
+ ret = config_cores_cmp_cgroups(&group_mock, &group_mock_2);
+ EXPECT_EQ_INT(-1, ret);
+
+ cores_mock_2[0] = 4;
+ ret = config_cores_cmp_cgroups(&group_mock, &group_mock_2);
+ EXPECT_EQ_INT(0, ret);
+ return 0;
+}
+
+int main(void) {
+ RUN_TEST(string_to_uint);
+ RUN_TEST(cores_list_to_numbers);
+ RUN_TEST(check_grouped_cores);
+
+ RUN_TEST(cores_group_cleanup);
+ RUN_TEST(cores_option_parse);
+ RUN_TEST(cores_option_parse_fail);
+ RUN_TEST(cores_default_list);
+ RUN_TEST(cores_default_list_fail);
+
+ RUN_TEST(cores_group_cmp);
+
+ END_TEST;
+}