X-Git-Url: https://git.verplant.org/?a=blobdiff_plain;f=src%2Fcollectd.conf.in;h=b675dfbcb2187e2ffdffdc0def586a7aa292f0c6;hb=c99e3a4d169ada9299c73e20662d17debdc32e1f;hp=6b59d4d550aef4ce33842c16f122e03ed3d3751d;hpb=cb90ca86e2c9b797b292ecf26ac4220355a30a4d;p=collectd.git
diff --git a/src/collectd.conf.in b/src/collectd.conf.in
index 6b59d4d5..b675dfbc 100644
--- a/src/collectd.conf.in
+++ b/src/collectd.conf.in
@@ -129,6 +129,7 @@
#@BUILD_PLUGIN_GRPC_TRUE@LoadPlugin grpc
#@BUILD_PLUGIN_HDDTEMP_TRUE@LoadPlugin hddtemp
#@BUILD_PLUGIN_HUGEPAGES_TRUE@LoadPlugin hugepages
+#@BUILD_PLUGIN_INTEL_PMU_TRUE@LoadPlugin intel_pmu
#@BUILD_PLUGIN_INTEL_RDT_TRUE@LoadPlugin intel_rdt
@BUILD_PLUGIN_INTERFACE_TRUE@@BUILD_PLUGIN_INTERFACE_TRUE@LoadPlugin interface
#@BUILD_PLUGIN_IPC_TRUE@LoadPlugin ipc
@@ -645,6 +646,14 @@
# ValuesPercentage false
#
+#
+# ReportHardwareCacheEvents true
+# ReportKernelPMUEvents true
+# ReportSoftwareEvents true
+# EventList "/var/cache/pmu/GenuineIntel-6-2D-core.json"
+# HardwareEvents "L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS" "L2_RQSTS.ALL_CODE_RD"
+#
+
#
# Cores "0-2"
#