X-Git-Url: https://git.verplant.org/?a=blobdiff_plain;f=src%2Fcollectd.conf.in;h=9b36e2379044d9367573549d43bd826c40e234c0;hb=6d79874b8afa65cbb4a8e348caf37b8e60fbeded;hp=6b59d4d550aef4ce33842c16f122e03ed3d3751d;hpb=7f38ca96e3a54a4b02475f857c7d79c6a1257ada;p=collectd.git
diff --git a/src/collectd.conf.in b/src/collectd.conf.in
index 6b59d4d5..9b36e237 100644
--- a/src/collectd.conf.in
+++ b/src/collectd.conf.in
@@ -129,6 +129,7 @@
#@BUILD_PLUGIN_GRPC_TRUE@LoadPlugin grpc
#@BUILD_PLUGIN_HDDTEMP_TRUE@LoadPlugin hddtemp
#@BUILD_PLUGIN_HUGEPAGES_TRUE@LoadPlugin hugepages
+#@BUILD_PLUGIN_INTEL_PMU_TRUE@LoadPlugin intel_pmu
#@BUILD_PLUGIN_INTEL_RDT_TRUE@LoadPlugin intel_rdt
@BUILD_PLUGIN_INTERFACE_TRUE@@BUILD_PLUGIN_INTERFACE_TRUE@LoadPlugin interface
#@BUILD_PLUGIN_IPC_TRUE@LoadPlugin ipc
@@ -645,6 +646,14 @@
# ValuesPercentage false
#
+#
+# ReportHardwareCacheEvents true
+# ReportKernelPMUEvents true
+# ReportSoftwareEvents true
+# EventList "/var/cache/pmu/GenuineIntel-6-2D-core.json"
+# HardwareEvents "L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS" "L2_RQSTS.ALL_CODE_RD"
+#
+
#
# Cores "0-2"
#
@@ -719,8 +728,11 @@
#
#
-# McelogClientSocket "/var/run/mcelog-client"
-# McelogLogfile "/var/log/mcelog"
+#
+# McelogClientSocket "/var/run/mcelog-client"
+# PersistentNotification false
+#
+# McelogLogfile "/var/log/mcelog"
#
#