2 * Partial header file imported from the linux kernel
3 * (arch/x86/include/asm/msr-index.h)
4 * as it is not provided by the kernel sources anymore
6 * Only the minimal blocks of macro have been included
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 #ifndef _ASM_X86_MSR_INDEX_H
24 #define _ASM_X86_MSR_INDEX_H
27 * CPU model specific register (MSR) numbers.
29 * Do not add new entries to this file unless the definitions are shared
30 * between multiple compilation units.
33 /* Intel MSRs. Some also available on other CPUs */
35 /* C-state Residency Counters */
36 #define MSR_PKG_C3_RESIDENCY 0x000003f8
37 #define MSR_PKG_C6_RESIDENCY 0x000003f9
38 #define MSR_ATOM_PKG_C6_RESIDENCY 0x000003fa
39 #define MSR_PKG_C7_RESIDENCY 0x000003fa
40 #define MSR_CORE_C3_RESIDENCY 0x000003fc
41 #define MSR_CORE_C6_RESIDENCY 0x000003fd
42 #define MSR_CORE_C7_RESIDENCY 0x000003fe
43 #define MSR_KNL_CORE_C6_RESIDENCY 0x000003ff
44 #define MSR_PKG_C2_RESIDENCY 0x0000060d
45 #define MSR_PKG_C8_RESIDENCY 0x00000630
46 #define MSR_PKG_C9_RESIDENCY 0x00000631
47 #define MSR_PKG_C10_RESIDENCY 0x00000632
49 /* Run Time Average Power Limiting (RAPL) Interface */
51 #define MSR_RAPL_POWER_UNIT 0x00000606
53 #define MSR_PKG_POWER_LIMIT 0x00000610
54 #define MSR_PKG_ENERGY_STATUS 0x00000611
55 #define MSR_PKG_PERF_STATUS 0x00000613
56 #define MSR_PKG_POWER_INFO 0x00000614
58 #define MSR_DRAM_POWER_LIMIT 0x00000618
59 #define MSR_DRAM_ENERGY_STATUS 0x00000619
60 #define MSR_DRAM_PERF_STATUS 0x0000061b
61 #define MSR_DRAM_POWER_INFO 0x0000061c
63 #define MSR_PP0_POWER_LIMIT 0x00000638
64 #define MSR_PP0_ENERGY_STATUS 0x00000639
65 #define MSR_PP0_POLICY 0x0000063a
66 #define MSR_PP0_PERF_STATUS 0x0000063b
68 #define MSR_PP1_POWER_LIMIT 0x00000640
69 #define MSR_PP1_ENERGY_STATUS 0x00000641
70 #define MSR_PP1_POLICY 0x00000642
74 /* Intel defined MSRs. */
75 #define MSR_IA32_TSC 0x00000010
76 #define MSR_SMI_COUNT 0x00000034
78 #define MSR_IA32_MPERF 0x000000e7
79 #define MSR_IA32_APERF 0x000000e8
81 #define MSR_IA32_THERM_STATUS 0x0000019c
83 #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2
85 #define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1
88 #endif /* _ASM_X86_MSR_INDEX_H */