2 * collectd - src/intel_pmu.c
4 * Copyright(c) 2017 Intel Corporation. All rights reserved.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 * Serhiy Pshyk <serhiyx.pshyk@intel.com>
34 #define PMU_PLUGIN "intel_pmu"
36 #define HW_CACHE_READ_ACCESS \
37 (((PERF_COUNT_HW_CACHE_OP_READ) << 8) | \
38 ((PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16))
40 #define HW_CACHE_WRITE_ACCESS \
41 (((PERF_COUNT_HW_CACHE_OP_WRITE) << 8) | \
42 ((PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16))
44 #define HW_CACHE_PREFETCH_ACCESS \
45 (((PERF_COUNT_HW_CACHE_OP_PREFETCH) << 8) | \
46 ((PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16))
48 #define HW_CACHE_READ_MISS \
49 (((PERF_COUNT_HW_CACHE_OP_READ) << 8) | \
50 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))
52 #define HW_CACHE_WRITE_MISS \
53 (((PERF_COUNT_HW_CACHE_OP_WRITE) << 8) | \
54 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))
56 #define HW_CACHE_PREFETCH_MISS \
57 (((PERF_COUNT_HW_CACHE_OP_PREFETCH) << 8) | \
58 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))
64 typedef struct event_info event_info_t;
66 struct intel_pmu_ctx_s {
67 _Bool hw_cache_events;
68 _Bool kernel_pmu_events;
70 char event_list_fn[PATH_MAX];
72 size_t hw_events_count;
73 struct eventlist *event_list;
75 typedef struct intel_pmu_ctx_s intel_pmu_ctx_t;
77 event_info_t g_kernel_pmu_events[] = {
78 {.name = "cpu-cycles", .config = PERF_COUNT_HW_CPU_CYCLES},
79 {.name = "instructions", .config = PERF_COUNT_HW_INSTRUCTIONS},
80 {.name = "cache-references", .config = PERF_COUNT_HW_CACHE_REFERENCES},
81 {.name = "cache-misses", .config = PERF_COUNT_HW_CACHE_MISSES},
82 {.name = "branches", .config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS},
83 {.name = "branch-misses", .config = PERF_COUNT_HW_BRANCH_MISSES},
84 {.name = "bus-cycles", .config = PERF_COUNT_HW_BUS_CYCLES},
87 event_info_t g_hw_cache_events[] = {
89 {.name = "L1-dcache-loads",
90 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_READ_ACCESS)},
91 {.name = "L1-dcache-load-misses",
92 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_READ_MISS)},
93 {.name = "L1-dcache-stores",
94 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_WRITE_ACCESS)},
95 {.name = "L1-dcache-store-misses",
96 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_WRITE_MISS)},
97 {.name = "L1-dcache-prefetches",
98 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_PREFETCH_ACCESS)},
99 {.name = "L1-dcache-prefetch-misses",
100 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_PREFETCH_MISS)},
102 {.name = "L1-icache-loads",
103 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_READ_ACCESS)},
104 {.name = "L1-icache-load-misses",
105 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_READ_MISS)},
106 {.name = "L1-icache-prefetches",
107 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_PREFETCH_ACCESS)},
108 {.name = "L1-icache-prefetch-misses",
109 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_PREFETCH_MISS)},
111 {.name = "LLC-loads",
112 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_READ_ACCESS)},
113 {.name = "LLC-load-misses",
114 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_READ_MISS)},
115 {.name = "LLC-stores",
116 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_WRITE_ACCESS)},
117 {.name = "LLC-store-misses",
118 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_WRITE_MISS)},
119 {.name = "LLC-prefetches",
120 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_PREFETCH_ACCESS)},
121 {.name = "LLC-prefetch-misses",
122 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_PREFETCH_MISS)},
124 {.name = "dTLB-loads",
125 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_READ_ACCESS)},
126 {.name = "dTLB-load-misses",
127 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_READ_MISS)},
128 {.name = "dTLB-stores",
129 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_WRITE_ACCESS)},
130 {.name = "dTLB-store-misses",
131 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_WRITE_MISS)},
132 {.name = "dTLB-prefetches",
133 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_PREFETCH_ACCESS)},
134 {.name = "dTLB-prefetch-misses",
135 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_PREFETCH_MISS)},
137 {.name = "iTLB-loads",
138 .config = (PERF_COUNT_HW_CACHE_ITLB | HW_CACHE_READ_ACCESS)},
139 {.name = "iTLB-load-misses",
140 .config = (PERF_COUNT_HW_CACHE_ITLB | HW_CACHE_READ_MISS)},
142 {.name = "branch-loads",
143 .config = (PERF_COUNT_HW_CACHE_BPU | HW_CACHE_READ_ACCESS)},
144 {.name = "branch-load-misses",
145 .config = (PERF_COUNT_HW_CACHE_BPU | HW_CACHE_READ_MISS)},
148 event_info_t g_sw_events[] = {
149 {.name = "cpu-clock", .config = PERF_COUNT_SW_CPU_CLOCK},
151 {.name = "task-clock", .config = PERF_COUNT_SW_TASK_CLOCK},
153 {.name = "context-switches", .config = PERF_COUNT_SW_CONTEXT_SWITCHES},
155 {.name = "cpu-migrations", .config = PERF_COUNT_SW_CPU_MIGRATIONS},
157 {.name = "page-faults", .config = PERF_COUNT_SW_PAGE_FAULTS},
159 {.name = "minor-faults", .config = PERF_COUNT_SW_PAGE_FAULTS_MIN},
161 {.name = "major-faults", .config = PERF_COUNT_SW_PAGE_FAULTS_MAJ},
163 {.name = "alignment-faults", .config = PERF_COUNT_SW_ALIGNMENT_FAULTS},
165 {.name = "emulation-faults", .config = PERF_COUNT_SW_EMULATION_FAULTS},
168 static intel_pmu_ctx_t g_ctx;
171 static void pmu_dump_events() {
173 DEBUG(PMU_PLUGIN ": Events:");
177 for (e = g_ctx.event_list->eventlist; e; e = e->next) {
178 DEBUG(PMU_PLUGIN ": event : %s", e->event);
179 DEBUG(PMU_PLUGIN ": group_lead: %d", e->group_leader);
180 DEBUG(PMU_PLUGIN ": end_group : %d", e->end_group);
181 DEBUG(PMU_PLUGIN ": type : %#x", e->attr.type);
182 DEBUG(PMU_PLUGIN ": config : %#x", (unsigned)e->attr.config);
183 DEBUG(PMU_PLUGIN ": size : %d", e->attr.size);
187 static void pmu_dump_config(void) {
189 DEBUG(PMU_PLUGIN ": Config:");
190 DEBUG(PMU_PLUGIN ": hw_cache_events : %d", g_ctx.hw_cache_events);
191 DEBUG(PMU_PLUGIN ": kernel_pmu_events : %d", g_ctx.kernel_pmu_events);
192 DEBUG(PMU_PLUGIN ": software_events : %d", g_ctx.sw_events);
194 for (size_t i = 0; i < g_ctx.hw_events_count; i++) {
195 DEBUG(PMU_PLUGIN ": hardware_events[%" PRIsz "]: %s", i,
200 #endif /* COLLECT_DEBUG */
202 static int pmu_config_hw_events(oconfig_item_t *ci) {
204 if (strcasecmp("HardwareEvents", ci->key) != 0) {
208 if (g_ctx.hw_events) {
209 ERROR(PMU_PLUGIN ": Duplicate config for HardwareEvents.");
213 g_ctx.hw_events = calloc(ci->values_num, sizeof(char *));
214 if (g_ctx.hw_events == NULL) {
215 ERROR(PMU_PLUGIN ": Failed to allocate hw events.");
219 for (int i = 0; i < ci->values_num; i++) {
220 if (ci->values[i].type != OCONFIG_TYPE_STRING) {
221 WARNING(PMU_PLUGIN ": The %s option requires string arguments.", ci->key);
225 g_ctx.hw_events[g_ctx.hw_events_count] = strdup(ci->values[i].value.string);
226 if (g_ctx.hw_events[g_ctx.hw_events_count] == NULL) {
227 ERROR(PMU_PLUGIN ": Failed to allocate hw events entry.");
231 g_ctx.hw_events_count++;
237 static int pmu_config(oconfig_item_t *ci) {
239 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
241 for (int i = 0; i < ci->children_num; i++) {
243 oconfig_item_t *child = ci->children + i;
245 if (strcasecmp("ReportHardwareCacheEvents", child->key) == 0) {
246 ret = cf_util_get_boolean(child, &g_ctx.hw_cache_events);
247 } else if (strcasecmp("ReportKernelPMUEvents", child->key) == 0) {
248 ret = cf_util_get_boolean(child, &g_ctx.kernel_pmu_events);
249 } else if (strcasecmp("EventList", child->key) == 0) {
250 ret = cf_util_get_string_buffer(child, g_ctx.event_list_fn,
251 sizeof(g_ctx.event_list_fn));
252 } else if (strcasecmp("HardwareEvents", child->key) == 0) {
253 ret = pmu_config_hw_events(child);
254 } else if (strcasecmp("ReportSoftwareEvents", child->key) == 0) {
255 ret = cf_util_get_boolean(child, &g_ctx.sw_events);
257 ERROR(PMU_PLUGIN ": Unknown configuration parameter \"%s\".", child->key);
262 DEBUG(PMU_PLUGIN ": %s:%d ret=%d", __FUNCTION__, __LINE__, ret);
274 static void pmu_submit_counter(int cpu, char *event, counter_t value,
276 value_list_t vl = VALUE_LIST_INIT;
278 vl.values = &(value_t){.counter = value};
281 sstrncpy(vl.plugin, PMU_PLUGIN, sizeof(vl.plugin));
283 snprintf(vl.plugin_instance, sizeof(vl.plugin_instance), "all");
286 snprintf(vl.plugin_instance, sizeof(vl.plugin_instance), "%d", cpu);
288 sstrncpy(vl.type, "counter", sizeof(vl.type));
289 sstrncpy(vl.type_instance, event, sizeof(vl.type_instance));
291 plugin_dispatch_values(&vl);
294 meta_data_t *pmu_meta_data_create(const struct efd *efd) {
295 meta_data_t *meta = NULL;
297 /* create meta data only if value was scaled */
298 if (efd->val[1] == efd->val[2] || !efd->val[2]) {
302 meta = meta_data_create();
304 ERROR(PMU_PLUGIN ": meta_data_create failed.");
308 meta_data_add_unsigned_int(meta, "intel_pmu:raw_count", efd->val[0]);
309 meta_data_add_unsigned_int(meta, "intel_pmu:time_enabled", efd->val[1]);
310 meta_data_add_unsigned_int(meta, "intel_pmu:time_running", efd->val[2]);
315 static void pmu_dispatch_data(void) {
319 for (e = g_ctx.event_list->eventlist; e; e = e->next) {
320 uint64_t all_value = 0;
321 int event_enabled = 0;
322 for (int i = 0; i < g_ctx.event_list->num_cpus; i++) {
324 if (e->efd[i].fd < 0)
329 /* If there are more events than counters, the kernel uses time
330 * multiplexing. With multiplexing, at the end of the run,
331 * the counter is scaled basing on total time enabled vs time running.
332 * final_count = raw_count * time_enabled/time_running
334 uint64_t value = event_scaled_value(e, i);
337 /* get meta data with information about scaling */
338 meta_data_t *meta = pmu_meta_data_create(&e->efd[i]);
340 /* dispatch per CPU value */
341 pmu_submit_counter(i, e->event, value, meta);
343 meta_data_destroy(meta);
346 if (event_enabled > 0) {
347 DEBUG(PMU_PLUGIN ": %-20s %'10lu", e->event, all_value);
348 /* dispatch all CPU value */
349 pmu_submit_counter(-1, e->event, all_value, NULL);
354 static int pmu_read(__attribute__((unused)) user_data_t *ud) {
357 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
359 ret = read_all_events(g_ctx.event_list);
361 ERROR(PMU_PLUGIN ": Failed to read values of all events.");
370 static int pmu_add_events(struct eventlist *el, uint32_t type,
371 event_info_t *events, size_t count) {
373 for (size_t i = 0; i < count; i++) {
374 /* Allocate memory for event struct that contains array of efd structs
377 calloc(sizeof(struct event) + sizeof(struct efd) * el->num_cpus, 1);
379 ERROR(PMU_PLUGIN ": Failed to allocate event structure");
384 e->attr.config = events[i].config;
385 e->attr.size = PERF_ATTR_SIZE_VER0;
388 if (el->eventlist_last)
389 el->eventlist_last->next = e;
390 el->eventlist_last = e;
391 e->event = strdup(events[i].name);
397 static int pmu_add_hw_events(struct eventlist *el, char **e, size_t count) {
399 for (size_t i = 0; i < count; i++) {
401 size_t group_events_count = 0;
403 char *events = strdup(e[i]);
408 for (s = strtok_r(events, ",", &tmp); s; s = strtok_r(NULL, ",", &tmp)) {
410 /* Allocate memory for event struct that contains array of efd structs
413 calloc(sizeof(struct event) + sizeof(struct efd) * el->num_cpus, 1);
419 if (resolve_event(s, &e->attr) != 0) {
420 WARNING(PMU_PLUGIN ": Cannot resolve %s", s);
425 /* Multiple events parsed in one entry */
426 if (group_events_count == 1) {
427 /* Mark previously added event as group leader */
428 el->eventlist_last->group_leader = 1;
434 if (el->eventlist_last)
435 el->eventlist_last->next = e;
436 el->eventlist_last = e;
437 e->event = strdup(s);
439 group_events_count++;
442 /* Multiple events parsed in one entry */
443 if (group_events_count > 1) {
444 /* Mark last added event as group end */
445 el->eventlist_last->end_group = 1;
454 static void pmu_free_events(struct eventlist *el) {
459 struct event *e = el->eventlist;
462 struct event *next = e->next;
467 el->eventlist = NULL;
470 static int pmu_setup_events(struct eventlist *el, bool measure_all,
472 struct event *e, *leader = NULL;
475 for (e = el->eventlist; e; e = e->next) {
477 for (int i = 0; i < el->num_cpus; i++) {
478 if (setup_event(e, i, leader, measure_all, measure_pid) < 0) {
479 WARNING(PMU_PLUGIN ": perf event '%s' is not available (cpu=%d).",
482 /* success if at least one event was set */
496 static int pmu_init(void) {
499 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
501 g_ctx.event_list = alloc_eventlist();
502 if (g_ctx.event_list == NULL) {
503 ERROR(PMU_PLUGIN ": Failed to allocate event list.");
507 if (g_ctx.hw_cache_events) {
509 pmu_add_events(g_ctx.event_list, PERF_TYPE_HW_CACHE, g_hw_cache_events,
510 STATIC_ARRAY_SIZE(g_hw_cache_events));
512 ERROR(PMU_PLUGIN ": Failed to add hw cache events.");
517 if (g_ctx.kernel_pmu_events) {
518 ret = pmu_add_events(g_ctx.event_list, PERF_TYPE_HARDWARE,
520 STATIC_ARRAY_SIZE(g_kernel_pmu_events));
522 ERROR(PMU_PLUGIN ": Failed to add kernel PMU events.");
527 /* parse events names if config option is present and is not empty */
528 if (g_ctx.hw_events_count) {
530 ret = read_events(g_ctx.event_list_fn);
532 ERROR(PMU_PLUGIN ": Failed to read event list file '%s'.",
533 g_ctx.event_list_fn);
537 ret = pmu_add_hw_events(g_ctx.event_list, g_ctx.hw_events,
538 g_ctx.hw_events_count);
540 ERROR(PMU_PLUGIN ": Failed to add hardware events.");
545 if (g_ctx.sw_events) {
546 ret = pmu_add_events(g_ctx.event_list, PERF_TYPE_SOFTWARE, g_sw_events,
547 STATIC_ARRAY_SIZE(g_sw_events));
549 ERROR(PMU_PLUGIN ": Failed to add software events.");
558 if (g_ctx.event_list->eventlist != NULL) {
559 /* measure all processes */
560 ret = pmu_setup_events(g_ctx.event_list, true, -1);
562 ERROR(PMU_PLUGIN ": Failed to setup perf events for the event list.");
567 ": Events list is empty. No events were setup for monitoring.");
574 pmu_free_events(g_ctx.event_list);
575 sfree(g_ctx.event_list);
576 for (size_t i = 0; i < g_ctx.hw_events_count; i++) {
577 sfree(g_ctx.hw_events[i]);
579 sfree(g_ctx.hw_events);
580 g_ctx.hw_events_count = 0;
585 static int pmu_shutdown(void) {
587 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
589 pmu_free_events(g_ctx.event_list);
590 sfree(g_ctx.event_list);
591 for (size_t i = 0; i < g_ctx.hw_events_count; i++) {
592 sfree(g_ctx.hw_events[i]);
594 sfree(g_ctx.hw_events);
595 g_ctx.hw_events_count = 0;
600 void module_register(void) {
601 plugin_register_init(PMU_PLUGIN, pmu_init);
602 plugin_register_complex_config(PMU_PLUGIN, pmu_config);
603 plugin_register_complex_read(NULL, PMU_PLUGIN, pmu_read, 0, NULL);
604 plugin_register_shutdown(PMU_PLUGIN, pmu_shutdown);